Chip-to-chip copper interconnects with rough surfaces: analytical models for parameter extraction and performance evaluation

Abstract

In multigigahertz integrated circuit design, the extra delay and power losses due to surface roughness in copper (Cu) interconnects is more evident than ever before and needs utmost consideration. This paper reports novel closed-form expressions for parameter extraction in chip-tochip Cu interconnects at several gigahertz frequency ranges considering experimentally measured fractal surface roughness. Backplane (BP) and printed circuit board (PCB) links are considered here to study the effect of surface roughness in chip-to-chip Cu interconnects. Our proposed model is verified with experimental characterization performed on fabricated interconnects structures as well as simulation data obtained using full-wave electromagnetic field solvers, i.e., HFSS and Q3D extractor, that show excellent accuracy. Our analysis, for the first time, quantitatively proves the penalty incurred due to surface roughness in chip-to-chip interconnects using experimental measured realistic surface profiles. We observe that surface roughness strongly affects the interconnect performance metrics, i.e., delay, energy-delay product, and bandwidth density of BP and PCB chip-to-chip interconnects at higher frequency regimes. At 100 GHz and 50 cm length, BP interconnects with all four rough surfaces exhibit 2.6× and 2.8× higher delay and energy budget, respectively, when compared to interconnects with smooth surfaces. Similarly, PCB interconnects in the worst case exhibit 2.5× and 2.6× higher delay and energy budget, respectively, due to surface roughness. We also present computational overhead for simulating BP and PCB interconnects with rough surfaces. The simulation time, physical memory, matrix size, and number of tetrahedrons increase by several times due to surface roughness. Finally, we present eye diagrams at 10- and 15-Gb/s data rates that show 53.4% and 40% penalty on eye height and signal-to-noise ratio, respectively.