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dc.contributor.authorPathania, S.-
dc.contributor.authorKumar, S.-
dc.contributor.authorSharma, R.-
dc.date.accessioned2020-03-19T10:44:29Z-
dc.date.available2020-03-19T10:44:29Z-
dc.date.issued2020-03-19-
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/1564-
dc.description.abstractIn this paper, crosstalk induced effects in a 3-line bus architecture for global interconnects has been investigated. The dimensions of global level Copper (Cu) interconnects at 22nm technology node are taken as per ITRS. Crosstalk effects have been analyzed for both repeated and unrepeated lines in ternary logic. We have compared crosstalk performance and signal integrity metrics for Cu interconnects with rough as well as smooth surfaces considering Carbon Nanotube FET-based drivers and receivers at 22nm node in ternary logic. Our simulation results show that worst case crosstalk delay, power delay product and number of repeaters used in Cu interconnects with rough surfaces are significantly higher than smooth interconnects. Also, bandwidth density, eye height and width are considerably degraded due to roughness.en_US
dc.language.isoen_USen_US
dc.subjectCrosstalen_US
dc.subjectSurface roughnessen_US
dc.subjectGlobal interconnectsen_US
dc.subjectRepeatersen_US
dc.titleCrosstalk analysis for rough copper interconnects considering ternary logicen_US
dc.typeArticleen_US
Appears in Collections:Year-2018

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