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dc.contributor.authorPandey, M. K.-
dc.contributor.authorGoyal, M.-
dc.contributor.authorSharma, P. K.-
dc.contributor.authorSharma, R.-
dc.date.accessioned2021-08-12T18:00:20Z-
dc.date.available2021-08-12T18:00:20Z-
dc.date.issued2021-08-12-
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/2375-
dc.description.abstractUSB, despite of being of the most commonly used serial bus protocol, has had posed many challenges for embedded systems community. Most common among these challenges include device detection and timeout failures, due to the inconsistency between the USB (protocol) specifications and eXtensible Host Controller Interface (xHCI) specifications. One such limitation related to USB power discharge is very often faced by USB engineers. To solve this problem, a two-resistor model has been developed in past, which has been found to have certain limitations and thus, does not accurately predict the discharge profile of the USB power for most of the device. So, in this paper we have presented an improved new model for USB power discharge (VBUS) mechanism as a dual current based model. With this model we improve the accuracy of discharge profile and reduce the model vs silicon error up to 75%. We claim that this representation of USB power discharge model is much more accurate and can aid the device designers in their calculations.en_US
dc.language.isoen_USen_US
dc.subjectPost Silicon Validationen_US
dc.subjectAnalog Validationen_US
dc.subjectSuperspeed USBen_US
dc.subjectUSB 3.xen_US
dc.subjectSerial Interfaceen_US
dc.subjectUSB Power Dischargeen_US
dc.titleDual current based power discharge model for embedded USB Host-Devices systemen_US
dc.typeArticleen_US
Appears in Collections:Year-2019

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