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DC Field | Value | Language |
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dc.contributor.author | Nishad, A. K. | - |
dc.contributor.author | Sharma, R. | - |
dc.date.accessioned | 2021-09-29T20:30:17Z | - |
dc.date.available | 2021-09-29T20:30:17Z | - |
dc.date.issued | 2021-09-30 | - |
dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/2832 | - |
dc.description.abstract | This paper establishes the importance of the lithium (Li) intercalation in multilayer graphene nanoribbon (MLGNR) interconnects for obtaining superior performance than conventional copper (Cu) on-chip interconnects. For the first time, we report performance analysis of Li-intercalated MLGNRs for local interconnect applications. In that, interconnect thickness is optimized for obtaining lowest delay and energy-delay-product (EDP). At 12 μm interconnect length, our optimized Li-intercalated MLGNRs exhibit (≈ 22.9 ps)1.9× and 4.1× lower delay and EDP, respectively, when compared to Cu. Even in presence of edge roughness, they exhibit (≈ 31.8 ps)1.37× and 2.5× lower delay and EDP, respectively, when compared to Cu. Our analysis quantitatively proves the potential of Li-intercalated MLGNRs for local interconnect applications. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Delay | en_US |
dc.subject | EDP | en_US |
dc.subject | interconnects | en_US |
dc.subject | intercalation | en_US |
dc.subject | MLGNRs | en_US |
dc.title | Lithium-Intercalated graphene interconnects: prospects for On-Chip applications | en_US |
dc.type | Article | en_US |
Appears in Collections: | Year-2016 |
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