Ultra low-energy active charge restoration DAC for SAR Analog-to-Digital converter

Abstract

A novel architecture for Digital-to-Analog converter (DAC) used in successive approximation register Analog-toDigital converters (SAR ADCs) is proposed. It reduces the energy consumption as well as required on-chip capacitor area. A single unit capacitor section using charge from a previously charged capacitor is added to the circuit in series after every comparison and any charge lost is partially restored. Using a single capacitor and charge sharing method reduces the energy consumption for capacitor switching, capacitor area and total capacitance to a small fraction of the conventional SAR ADC.