Please use this identifier to cite or link to this item: http://dspace.iitrpr.ac.in:8080/xmlui/handle/123456789/3190
Title: Design of a PRBS generator and a serializer using active inductor employed CML latch
Authors: Singh, P.
Singh, M. K.
Hande, V. G.
Sakare, M.
Keywords: D-Latch
PRBS
Digital circuits
low power
CML logic.
Issue Date: 16-Nov-2021
Abstract: This paper presents an inductor less D-latch for high-speed integrated circuits. The proposed D-latch uses negative feedback, which makes the high-frequency input impedance appear inductive. This effect increases the bandwidth by about 23%. The proposed latch operation is verified using two highspeed integrated circuit applications, i.e., A pseudo-random binary sequence (PRBS) generator and a serializer. The PRBS generator and the serializer show an improvement of 15.8% and 23%, respectively, using the proposed latch. Results are confirmed using post-layout simulation in standard 90 nm CMOS technology with 1 V supply.
URI: http://localhost:8080/xmlui/handle/123456789/3190
Appears in Collections:Year-2021

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