Please use this identifier to cite or link to this item:
http://dspace.iitrpr.ac.in:8080/xmlui/handle/123456789/3190
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Singh, P. | - |
dc.contributor.author | Singh, M. K. | - |
dc.contributor.author | Hande, V. G. | - |
dc.contributor.author | Sakare, M. | - |
dc.date.accessioned | 2021-11-16T18:29:22Z | - |
dc.date.available | 2021-11-16T18:29:22Z | - |
dc.date.issued | 2021-11-16 | - |
dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/3190 | - |
dc.description.abstract | This paper presents an inductor less D-latch for high-speed integrated circuits. The proposed D-latch uses negative feedback, which makes the high-frequency input impedance appear inductive. This effect increases the bandwidth by about 23%. The proposed latch operation is verified using two highspeed integrated circuit applications, i.e., A pseudo-random binary sequence (PRBS) generator and a serializer. The PRBS generator and the serializer show an improvement of 15.8% and 23%, respectively, using the proposed latch. Results are confirmed using post-layout simulation in standard 90 nm CMOS technology with 1 V supply. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | D-Latch | en_US |
dc.subject | PRBS | en_US |
dc.subject | Digital circuits | en_US |
dc.subject | low power | en_US |
dc.subject | CML logic. | en_US |
dc.title | Design of a PRBS generator and a serializer using active inductor employed CML latch | en_US |
dc.type | Article | en_US |
Appears in Collections: | Year-2021 |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Full Text.pdf | 2.75 MB | Adobe PDF | View/Open Request a copy |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.