Please use this identifier to cite or link to this item: http://dspace.iitrpr.ac.in:8080/xmlui/handle/123456789/3477
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dc.contributor.authorGoel, A.-
dc.contributor.authorRawat, A.-
dc.contributor.authorRawat, B.-
dc.date.accessioned2022-06-02T13:44:33Z-
dc.date.available2022-06-02T13:44:33Z-
dc.date.issued2022-06-02-
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/3477-
dc.description.abstractIn this work, we examine and benchmark the analog/RF performance metrics of silicon-based multigate devices, such as Fin-FET, gate-all-around nanowire (NW)-FET, and gate-all-around nanosheet (NS)-FET, in the ultimate scaling limit of sub-5-nm technology node. The performance analysis of multigate devices is done using a fully calibrated 3-D technology computer-aided design (TCAD) simulation based on self-consistent solutions of Poisson's equation, drift-diffusion transport equation, and carrier continuity equation with quantum correction terms for accounting band-to-band tunneling and confinement effects. Our performance benchmarking suggests that NS-FET with (100) surface orientation is a more favorable candidate over NW-FET and Fin-FET for analog/RF applications with higher voltage gain (32 V/V), higher peak cutoff frequency (373 GHz), and higher maximum oscillation frequency (389 GHz) at the 5-nm technology node. The performance benefits of NS-FET are found to be retained by decreasing the channel length, increasing the effective device width, and stacking the multichannel. Furthermore, our studies identify the proper directions to optimizations for achieving high-frequency and high-gain RF operations with multigate devices.en_US
dc.language.isoen_USen_US
dc.subjectAnalog/rfen_US
dc.subjectCutoff frequencyen_US
dc.subjectFin-feten_US
dc.subjectNanosheet (ns)-feten_US
dc.subjectNanowire (nw)-feten_US
dc.subjectSi-based feten_US
dc.subjectSub-5-nm technology nodeen_US
dc.subjectTechnology computer-aided design (tcad) simulationen_US
dc.subjectVoltage gainen_US
dc.titleBenchmarking of Analog/RF performance of Fin-FET, NW-FET, and NS-FET in the ultimate scaling limiten_US
dc.typeArticleen_US
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