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Results 21-30 of 78 (Search time: 0.0 seconds).
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Issue DateTitleAuthor(s)
11-Dec-2019Foreword: special section on packaging and interconnects: cutting-edge solutions in modeling, design, and characterization—part ITelescu, M.; Gu, X.; Sharma, R.
30-Aug-2018Colloidal synthesized cobalt nanoparticles for nonvolatile memory device applicationYadav, M.; Velampati, R. S. R.; Sharma, R.
13-Nov-2018Investigating the role of sidewall surface roughness on the performance of through silicon viasKumar, S.; Pathania, S.; Sharma, R.
23-Aug-2019Implications of on-chip single-source clocking on high-speed serial interfaces in network socPandey, M.K.; Gupta, T.; Sharma, R.
11-Dec-2019Foreword: special section on packaging and Interconnects: cutting-edge solutions in modeling, design, and characterization—Part IITelescu, M.; Gu, X.; Sharma, R.
19-Mar-2020Simulation-based impedance characterization of PDN in high-performance multi-chip HTCC packages for avionicsDang, A.; Jilla, S.P.; Kumar, K.; Singh, G.; Sharma, R.; Mukerji, A.
19-Mar-2020Crosstalk analysis for rough copper interconnects considering ternary logicPathania, S.; Kumar, S.; Sharma, R.
13-Jun-2021First principle analysis of os-passivated armchair graphene nanoribbons for nanoscale interconnectsNishad, V. K.; Nishad, A. K.; Kaushik, B. K.; Sharma, R.
18-Jun-2021Temperature and dielectric surface roughness dependent performance analysis of cu-graphene hybrid interconnectsKumar, R.; Kumari, B.; Kumar, S.; Sahoo, M.; Sharma, R.
20-Jun-2021A temperature and dielectric roughness-aware matrix rational approximation model for the reliability assessment of Copper– Graphene hybrid On-Chip interconnectsKumar, R.; Kumar, A.; Guglani, S.; Kumar, S.; Roy, S.; Kaushik, B. K.; Sharma, R.; Achar, R.