Please use this identifier to cite or link to this item: http://dspace.iitrpr.ac.in:8080/xmlui/handle/123456789/4403
Title: Power quality assessment of solar inverters connected with utility grid/micro-grid
Authors: Gupta, B.K.
Keywords: Characteristic impedance
Circulating current
Closed loop controller modeling
Common DC Bus
Common mode voltage
Issue Date: 22-May-2023
Abstract: The Interface inverters arbitrate the network impedance based on the source characteristics for efficient solar energy harvesting. The wide impedance arbitration capability of the interface inverter defines the wide operational integrity with the AC network. In the weak grid scenario, the uncompensated grid inductance beyond PCC offers the negative damping for power oscillations at the point of common coupling (PCC) tugs the system towards instability. In this research work, the negative damping influence due to interactions between the system impedance (filter inductance and grid power injection resistance) and AC network impedance (grid inductance) on the inverter closed-loop controller is characterized by observing the natural phase deviations in real and imaginary axis. Through distinguished system’s natural response, a novel second-order system impedance model is derived, and proposed current controller gain characterization aiming to achieve positive damping to mitigate the PCC’s oscillations. Further tuning of the controller based on the natural response of the derived impedance model accomplishes the enhanced grid injected power quality. The efficacy of the derived system impedance model along with coherence of current controller gain is demonstrated on hardware for enhanced power quality under the stable operating region.Apart from this , a new series solar inverter configuration is proposed to share the power in terms of voltage, unlike parallel inverter configurations. In a single-stage parallel inverter, elevated DC potential and circulating current due to common-mode voltage (CMV) would degrade the solar inverter’s life. The proposed topology eases the stress on the DC bus and protects the solar inverter from the issues associated with elevated DC potential (Potential induced degradation effect, switch operating voltage stress, etc.). The inherent boosting capability of the proposed series inverter with two modular inverters is demonstrated through two switching algorithms. In the first switching algorithm, the switching combinations are devised to yield the maximum voltage across the load. The second switching algorithm demonstrates the method of eliminating CMV by choosing the appropriate switching combination of two inverters. The eliminated instantaneous CMV would give the provision of operating proposed topology with common DC bus along with the flexibility of DC bus grounding. For the proposed configuration with devised switching techniques, the closed-loop controller is designed by computing the plant’s equivalent characteristic impedance using a state-space model. The effectiveness of the proposed configuration, along with the closed-loop control, is validated through hardware. Also the multi boost solar inverter topologies of three variants are presented for grid connected applications. Since the proposed topologies aim to achieve higher voltage boost at AC side with reduced DC bus potential, it is required to use asynchronous switching strategies, unlike parallel inverter configurations. Although the proposed topologies are advantageous in-terms of improved reliability of solar panels and inverter modules, but instantaneous characteristic impedance imbalance due to asynchronous switching provokes circulating current within the inverter modules. Since the circulating current is undesirable concerning power quality and thermal aspects, in this research work, the method of instantaneous impedance balance is ensured with the specially designed switching algorithm for proposed topologies. The eliminated instantaneous circulating current provide the flexibility of operating all inverter modules with the common DC bus. The proposed high gain boost configurations and switching methodologies are demonstrated on hardware prototype by pumping 2.4 kW power to the grid.
URI: http://dspace.iitrpr.ac.in:8080/xmlui/handle/123456789/4403
Appears in Collections:Year- 2023

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