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Title: | Design of a high precision CMOS programmable gain and data rate delta sigma ADC |
Authors: | Saeed, M A Srivastava, R K Sehgal, D Das, D M |
Keywords: | Delta sigma modulator Analog multiplexer Programmable gain amplifer Digital flter |
Issue Date: | 2-Jul-2024 |
Abstract: | Abstract: This paper presents a general purpose high precision Delta Sigma ( ) ADC with a common mode rejection of 100 dB, developed for data acquisition of sensors used in a satellite launch vehicle telemetry system. To make ADC suitable for various sensor outputs such as temperature sensor, pressure sensor, strain sensor etc., the ADC offers eight digitally programmable gain values (X1, X2, X4, X8, X16, X32, X64 and X128). This ADC uses a second order delta sigma modulator (DSM) followed by a digital sinc filter. The output data rate of the ADC is also digitally programmable and can be set to any value of 312.5 Hz, 625 Hz, 1.25 kHz and 2.5 kHz. The ADC is also equipped with on chip offset and gain calibration features to reduce the offset and gain errors. The serial interface of ADC is SPI compatible. The proposed ADC is designed and fabricated in single poly, 4-metal, 0.18 μm CMOS process at Semi-Conductor Laboratory (SCL). The ADC is clocked at 5.12 MHz and consumes a total power of 4 mW and occupies 2.25 mm of silicon area. The ADC requires a supply voltage of 3.3 V and 1.8 V and can operate in a wide temperature range of 55 to 125 C. The proposed ADC achieves a maximum ENOB of 19.15 bits at a data rate of 312.5 Hz with a full scale range of 1.22 V. |
URI: | http://dspace.iitrpr.ac.in:8080/xmlui/handle/123456789/4646 |
Appears in Collections: | Year-2023 |
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