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DC Field | Value | Language |
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dc.contributor.author | Vohra, S K | - |
dc.contributor.author | Thomas, S A. | - |
dc.contributor.author | Shivdeep | - |
dc.contributor.author | Sakare, M | - |
dc.contributor.author | Das, D M | - |
dc.date.accessioned | 2024-07-12T12:38:04Z | - |
dc.date.available | 2024-07-12T12:38:04Z | - |
dc.date.issued | 2024-07-12 | - |
dc.identifier.uri | http://dspace.iitrpr.ac.in:8080/xmlui/handle/123456789/4694 | - |
dc.description.abstract | Abstract: Spiking neural networks (SNNs) implemented in neuromorphic computing architectures promise a high degree of bio-plausibility and energy efficiency compared to the artificial neural network (ANN). Thus, SNN-based spiking associative memories are preferred for high capacity, area, and energy-efficient neural associative memories (NAMs). While most previously published works focused on ANN-based NAM, this work implements the full CMOS circuit of memristor crossbar-based spiking NAM for the first time. Instead of using any software-based memristive SPICE model or memristive devices that are yet not available in standard CMOS technology process design kits (PDKs), in our work, the CMOS-based memristive synapse circuit is employed to address practical circuit implementation challenges. The complete ON-chip learning of the system is demonstrated using the bio-plausible spike-timing-dependent plasticity (STDP) learning mechanism without employing any external coprocessor, e.g., microprocessor, field-programmable gate array (FPGA). The entire system is implemented at the transistor level using 180-nm standard CMOS technology to demonstrate the pattern recognition application. The robustness of the proposed circuit is also evaluated to demonstrate the tolerance against the CMOS fabrication non-idealities. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | In situ learning | en_US |
dc.subject | memristor crossbar | en_US |
dc.subject | spiketiming-dependent plasticity (STDP) | en_US |
dc.subject | spiking neural associative memory (NAM) | en_US |
dc.subject | spiking neural network (SNN) | en_US |
dc.title | Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse | en_US |
dc.type | Article | en_US |
Appears in Collections: | Year-2023 |
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Full Text.pdf | 7.65 MB | Adobe PDF | View/Open Request a copy |
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