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Title: | RT-MIL-STD-1553+: Remote terminal controller for MIL-STD-1553B at 100-Mb/s data rate |
Authors: | Pendyala, P. Pasupureddi, V.S.R. |
Keywords: | Architectural enhancement CMOS technology Processor interfaces Protocol control Remote terminals |
Issue Date: | 19-Nov-2016 |
Abstract: | This work proposes a MIL-STD-1553B remote terminal controller: RT-MIL-STD-1553+, which processes data rates of 100-Mb/s over 1553 buses. This redesigned controller has three major architectural enhancements over the current 1-Mb/s controllers. Firstly, it incorporates a synchronous back-end and host processor interface to a true dual port memory to enable faster memory accesses. Secondly, the controller employs a majority-based sampling free-running decoder, suitable to interface with 100-Mb/s analog transceivers. Thirdly, the remote terminal protocol control unit has scaled-up state machines to manage the scheduling, storage and retrieval of 1553 messages, to ensure this increased throughput. The proposed remote terminal controller has been implemented in 1.2 V, 65-nm CMOS technology. Performance results show a power consumption of 14.59 mW at 100-Mb/s data rate for a 100 percent duty cycle, occupying an area of 104981 μm2, for a target BER of 10-7. |
URI: | http://localhost:8080/xmlui/handle/123456789/492 |
Appears in Collections: | Year-2015 |
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