This paper presents a low-power 6-bit 1 GS/s partially active flash analog-to-digital converters (ADC) in 65-nm CMOS technology. A novel comparator offset correction technique is proposed, which does not require additional ...

In this article, the design and development aspects of a compact bio-potential measuring system, named ExGSense, is presented. Two versions of the prototype have been developed; first one can measure 3 + 1 V leads in ...

A PUF based hardware security circuit (PBHSC) is proposed for testable ICs containing design for testability (DFT) circuitry. DFT techniques such as scan chain enhance the controllability and observability of internal ...

There is a perpetual need of evolution in data converters to cater the demand of high speed and accurate data acquisition and processing. The trainable neural data converters can be trained using supervised learning ...