Abstract:
Power efficiency is one of the grand challenge
problems facing computer architecture in recent years. Driven
by the growth towards green computing, it is imperative to
design architectures that can provide maximum power savings
while incurring minimal overhead on real estate and performance. Towards this we propose a state-preserving mechanism
for dynamically configuring DRAM banks based on utilization.
We propose a novel mechanism via which it is possible to
dynamically power down and power on banks while taking the
bank utilization and overall performance into account. Over
extensive experimentation using memory intensive applications,
we can observe a power savings of up to 12.31% while incurring
an average performance loss of 0.82% over baseline executions.
