INSTITUTIONAL DIGITAL REPOSITORY

Design space exploration of through silicon vias for high-speed, low loss vertical links

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dc.contributor.author Kumar, S.
dc.contributor.author Kaur, S.
dc.contributor.author Bakshi, M.
dc.contributor.author Bansal, M.
dc.contributor.author Choudhary, M.
dc.contributor.author Sharma, R.
dc.date.accessioned 2021-09-27T08:26:44Z
dc.date.available 2021-09-27T08:26:44Z
dc.date.issued 2021-09-27
dc.identifier.uri http://localhost:8080/xmlui/handle/123456789/2793
dc.description.abstract In this paper, performance analysis of Through Silicon Vias (TSVs) considering various bonding techniques is investigated. In that, bonding of TSVs using Cu-Sn microbumps, Cu-Ag microbumps and Cu-Cu direct bonding is considered. We present SPICE-compatible equivalent circuits for these configurations using exhaustive simulations performed on electromagnetic field solver, Ansys Q3D. We analyze these TSV configurations for various interconnect performance metrics, such as delay, energy delay product, energy per bit, insertion loss and bandwidth density. Our analysis gives physical insights into the effect of microbumps/discontinuities on the TSV performance. Our analytical results show that vertical interconnects using Cu-Cu direct bonding significantly outperforms those using Cu-Ag or Cu-Sn microbumps, which makes it an excellent candidate for high-speed, low loss vertical links en_US
dc.language.iso en_US en_US
dc.subject Through-silicon-vias en_US
dc.subject microbumps en_US
dc.subject copper-copper direct bonding en_US
dc.subject 3D integrtation en_US
dc.subject delay en_US
dc.subject energy en_US
dc.subject bandwidth density en_US
dc.title Design space exploration of through silicon vias for high-speed, low loss vertical links en_US
dc.type Article en_US


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