Abstract:
This paper presents an inductor less D-latch for
high-speed integrated circuits. The proposed D-latch uses negative feedback, which makes the high-frequency input impedance
appear inductive. This effect increases the bandwidth by about
23%. The proposed latch operation is verified using two highspeed integrated circuit applications, i.e., A pseudo-random
binary sequence (PRBS) generator and a serializer. The PRBS
generator and the serializer show an improvement of 15.8%
and 23%, respectively, using the proposed latch. Results are
confirmed using post-layout simulation in standard 90 nm CMOS
technology with 1 V supply.
