Abstract:
In nanoscale interconnects parasitic components are becoming
drastically important with geometrical scaling. This work presents a comprehensive study of copper (Cu), SWCNT bundle, MWCNT, SC-MLGNR and
TC-MLGNR nano interconnect in deep submicron (DSM) regime. We have
extracted parasitic resistance of the above mentioned interconnects using physics based equivalent circuit models and investigated the effective resistivity of
these interconnects at different technology nodes in DSM regime. It must be
noted that when the dimensions of interconnect follow nanoscale, resistivity
becomes the function of grain size. The nanoscale dimensions result in edge
scattering and grain boundary scattering which inculcates tremendous effect on
effective MFP. We examined the effect of grain size in scaled interconnects and
analyzed the effect of edge and grain boundary scattering on resistivity of
nanoscale interconnect. In our work we have look over five different interconnect geometries for the parasitic resistive component at 7 nm node and 14 nm
node. We take Cu as a reference interconnect in our analysis. Our analysis show
that the parasitic resistance of SWCNT Bundle, MWCNT, TC-MLGNR,
SC-MLGNR interconnect is reduced by 77%, 84%, 59%, 80% compared to Cu
interconnect at 7 nm node respectively. Our results also indicate a decrease of
parasitic resistance by 70%, 80%, 35%, 60% compared to Cu interconnect at
14 nm node respectively. These calculations are valid below width of 14 nm. In
this paper we have presented some Graphene counter parts which make it more
promising candidate than CNT bundle interconnect apart from having greater p.
u.l. resistance. We have analyzed the effects of Fermi energy and width on
number of conduction channels for different technology nodes. This paper also
shows comparable resistance of MWCNT and SWCNT due to reduced MFP of
former interconnect.
