Efficient on-chip communication for neuromorphic systems

Abstract

Neuromorphic computing is a trending area in computer architecture which deals with the simulation of the brain on hardware. Machine learning problems are very complex to solve by simple computers that work based on Von-Neumann architecture so we need to find architectures that are inspired by the brain and efficient for machine learning, artificial intelligence, and more complex applications. The design has been proposed to implement the traditional software-based Spiking Neural Net-works (SNN) on hardware. However, a major challenge that this SNN based hardware face is the efficient on-chip communications between the neurons. Since SNN has lots of multicast messages to be communicated among the layers, traditional on-chip routing techniques are not sufficient. In this paper, we have proposed a dynamic clustering based on-chip routing mechanism for SNN based hardware. The clustering is based on the dynamic behavior of routers. Compared with the existing clustering-based on-chip routing technique, the proposed technique gives 14% to 38% improvement over average packet latency.