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A high-k, metal gate vertical-slit FET for ultra-low power and high-speed applications
Kumar, S.
;
Kaur, S.
;
Sharma, R.
(
2021-10-04
)
Performance modeling and broadband characterization of chip-to-chip interconnects with rough surfaces
Kumar, S.
;
Sharma, R.
(
2021-10-10
)
Knowledge-Based neural networks for fast design space exploration of hybrid Copper-Graphene On-Chip interconnect networks
Kumar, R.
;
Narayan, S. S. L.
;
Kumar, S.
;
Roy, S.
;
Kaushik, B. K.
;
Achar, R.
;
Sharma, R.
(
2021-10-24
)
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Author
Kumar, S. (13)
Sharma, R. (13)
Kumar, R. (7)
Kaushik, B. K. (5)
Roy, S. (5)
Achar, R. (4)
Guglani, S. (3)
Kaur, S. (2)
Kumar, A. (2)
Narayan, S. S. L. (2)
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Subject
Copper (3)
graphene (2)
resistivity (2)
3D integrtation (1)
Artificial neural networks (ANN) (1)
Artificial neural networks (ANNs) (1)
bandwidth density (1)
Bilayer graphene (1)
Bilayer graphene (BLG) (1)
CFD (1)
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Date Issued
2021 (13)