MIL-STD-1553+: Integrated remote terminal and bus controller at 100-Mb/s data rate

dc.contributor.author	Pendyala, P.
dc.contributor.author	Pasupureddi, V.S.R.
dc.date.accessioned	2016-11-19T08:47:20Z
dc.date.available	2016-11-19T08:47:20Z
dc.date.issued	2016-11-19
dc.identifier.uri	http://localhost:8080/xmlui/handle/123456789/490
dc.description.abstract	This work proposes an integrated remote terminal and bus controller: MIL-STD-1553+, implemented in 1.2 V 65-nm CMOS technology occupying 115470 μm2 of area. It incorporates a synchronous back-end and host processor interface to a true dual port memory for faster memory accesses. Employing a majority-based sampling free-running decoder at its front-end and scaled-up protocol state machines in its control unit, this redesigned controller achieves 100-Mb/s with BER of 10-7 over 1553 buses, consuming a total power of 29.86 mW.	en_US
dc.language.iso	en_US	en_US
dc.subject	CMOS technology	en_US
dc.subject	Control unit	en_US
dc.subject	Dual-port memory	en_US
dc.title	MIL-STD-1553+: Integrated remote terminal and bus controller at 100-Mb/s data rate	en_US
dc.type	Article	en_US