INSTITUTIONAL DIGITAL REPOSITORY

RT-MIL-STD-1553+: Remote terminal controller for MIL-STD-1553B at 100-Mb/s data rate

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dc.contributor.author Pendyala, P.
dc.contributor.author Pasupureddi, V.S.R.
dc.date.accessioned 2016-11-19T09:01:25Z
dc.date.available 2016-11-19T09:01:25Z
dc.date.issued 2016-11-19
dc.identifier.uri http://localhost:8080/xmlui/handle/123456789/492
dc.description.abstract This work proposes a MIL-STD-1553B remote terminal controller: RT-MIL-STD-1553+, which processes data rates of 100-Mb/s over 1553 buses. This redesigned controller has three major architectural enhancements over the current 1-Mb/s controllers. Firstly, it incorporates a synchronous back-end and host processor interface to a true dual port memory to enable faster memory accesses. Secondly, the controller employs a majority-based sampling free-running decoder, suitable to interface with 100-Mb/s analog transceivers. Thirdly, the remote terminal protocol control unit has scaled-up state machines to manage the scheduling, storage and retrieval of 1553 messages, to ensure this increased throughput. The proposed remote terminal controller has been implemented in 1.2 V, 65-nm CMOS technology. Performance results show a power consumption of 14.59 mW at 100-Mb/s data rate for a 100 percent duty cycle, occupying an area of 104981 μm2, for a target BER of 10-7. en_US
dc.language.iso en_US en_US
dc.subject Architectural enhancement en_US
dc.subject CMOS technology en_US
dc.subject Processor interfaces en_US
dc.subject Protocol control en_US
dc.subject Remote terminals en_US
dc.title RT-MIL-STD-1553+: Remote terminal controller for MIL-STD-1553B at 100-Mb/s data rate en_US
dc.type Article en_US


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