INSTITUTIONAL DIGITAL REPOSITORY

DVFS and duplication based scheduling for optimizing power and performance in heterogeneous multiprocessors

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dc.contributor.author Singh, J.
dc.contributor.author Auluck, N.
dc.date.accessioned 2016-11-23T04:37:08Z
dc.date.available 2016-11-23T04:37:08Z
dc.date.issued 2016-11-23
dc.identifier.uri http://localhost:8080/xmlui/handle/123456789/569
dc.description.abstract Improving power consumption and performance are the important goals of scheduling on multiprocessors. In power aware scheduling with dynamic voltage/frequency scaling (DVFS), tasks are made to run on low voltages, which decreases their computation power. However, it also increases their execution costs and hence, may increase the schedule length. Furthermore, applying DVFS on processors does not impact the communication delay and power consumption. Duplicating a task on multiple processors reduces the communication delay among processors, which further reduces the schedule length and improves the performance1 . Additionally, duplication reduces the communication energy among processors, but also increases the overall computation energy. In this paper, we propose an integrated DVFS and duplication based solution to schedule task graphs on heterogeneous multiprocessors. The use of both techniques is optimized with Mixed Integer Programming (MIP) formulation to achieve better power and performance at the same time. To enhance the MIP convergence, each task is run by integrating the maximum and minimum voltage on a processor instead of iterating through all the voltage levels. The results demonstrate a minimum of 50% improvement in the processor power and 20−50% improvement in the total power (processor and communication) with a performance comparable to the other algorithms. en_US
dc.language.iso en_US en_US
dc.subject DVFS en_US
dc.subject Duplication en_US
dc.subject DAG Scheduling en_US
dc.subject Heterogeneous multiprocessors en_US
dc.title DVFS and duplication based scheduling for optimizing power and performance in heterogeneous multiprocessors en_US
dc.type Article en_US


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